NXP Semiconductors /QN908XC /SYSCON /PIO_WAKEUP_EN1

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Interpret as PIO_WAKEUP_EN1

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PB00_WAKEUP_EN)PB00_WAKEUP_EN 0 (PB01_WAKEUP_EN)PB01_WAKEUP_EN 0 (PB02_WAKEUP_EN)PB02_WAKEUP_EN 0 (PA04_32K_OE)PA04_32K_OE 0 (PA05_XTAL_OE)PA05_XTAL_OE 0 (PA10_32K_OE)PA10_32K_OE 0 (PA11_XTAL_OE)PA11_XTAL_OE 0 (PA18_32K_OE)PA18_32K_OE 0 (PA19_XTAL_OE)PA19_XTAL_OE 0 (PA24_32K_OE)PA24_32K_OE 0 (PA25_XTAL_OE)PA25_XTAL_OE 0 (PDM_IO_SEL)PDM_IO_SEL

Description

pin function selection in power down mode register 1

Fields

PB00_WAKEUP_EN

Control GPIOB as Wakeup source.

PB01_WAKEUP_EN

no description available

PB02_WAKEUP_EN

no description available

PA04_32K_OE

32K clock output enable. When this bit is set to 1 PA04 will output 32k clock. At this time PIN_CTRL register is not effective to control this IO’s function.

PA05_XTAL_OE

XTAL clock output enable. When this bit is set to 1 PA05 will output XTAL clock. At this time PIN_CTRL register is not effective to control this IO’s function.

PA10_32K_OE

32K clock output enable. When this bit is set to 1 PA10 (GPIO10) will output 32k clock. At this time PIN_CTRL register is not effective to control this IO’s function.

PA11_XTAL_OE

XTAL clock output enable. When this bit is set to 1 PA11 will output XTAL clock. At this time PIN_CTRL register is not effective to control this IO’s function.

PA18_32K_OE

32K clock output enable. When this bit is set to 1 PA18 will output 32k clock. At this time PIN_CTRL register is not effective to control this IO’s function.

PA19_XTAL_OE

XTAL clock output enable. When this bit is set to 1 PA19 will output XTAL clock. At this time PIN_CTRL register is not effective to control this IO’s function.

PA24_32K_OE

32K clock output enable. When this bit is set to 1 PA24 will output 32k clock. At this time PIN_CTRL register is not effective to control this IO’s function.

PA25_XTAL_OE

XTAL clock output enable. When this bit is set to 1 PA25 will output XTAL clock. At this time PIN_CTRL register is not effective to control this IO’s function.

PDM_IO_SEL

pin status selection in power down mode

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